AMD K5
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K5是一個由AMD製作與Intel推出的Pentium競爭的產品。 Introduced in 1995 over a year late, AMD's problems were compounded by being unable to manufacture the chip at the clock speeds originally projected. In its favor, the K5 did at least offer good x86 compatibility. All models had 4.3 million transistors on-chip. No K5 supported MMX instructions. Internally ambitious, it was closer to a Pentium Pro than a Pentium, based upon an internal highly parallel 29k RISC processor architecture with an x86 decoding front-end.
- Five integer units, which could process instructions out of order, one floating point unit, compared to two units of the Pentium.
- The branch target buffer was four times the size of the Pentium's, although not reportedly more accurate.
- Register renaming improved parallel performance of the pipelines.
- Speculative execution of instructions reduced pipeline stall.
- The instruction cache was 16 KiB, double the Pentium.
- The primary cache was 4-way set associative instead of the Pentium's 2-way.
The K5 project represented an early chance for AMD to take technical leadership from Intel. Although the chip addressed the right design concepts, the actual engineering implementation was weak. The low clock rates were due in part to AMD's deficiencies as a manufacturing company in the period. However, having a branch prediction unit four times the size of the Pentium, yet reportedly not delivering superior performance, is an example of how the actual implementation fell short of the project goals. Additionally, while the K5's floating point performance was better than that of the Cyrix 6x86, it was weaker than that of the Pentium. Because it was late to market and did not meet performance expectations, the K5 never gained the acceptance among large computer manufacturers that the Am486 and AMD K6 enjoyed. Overall, the chip failed to deliver, both in terms of raw performance, and financially for AMD.
There were two sets of K5 processors, internally called the SSA/5 and the 5k86, both released with the K5 label. The "SSA/5" line ran from 75 to 100 MHz (5K86 P75 to P100, later K5 PR-75 to PR100); the "5k86" line ran from 90 to 133 MHz. However, AMD used what it called a PR rating, or performance rating, to label the chips according to their equivalence to a Pentium of that clock speed. Thus, a 116 MHz chip from the second line was marketed as the "K5 PR166".
[编辑] 型號
[编辑] SSA/5
- Sold as 5K86 P75 to P100, later as K5 PR75 to PR100
- 在350/500nm有430萬個電晶體
- 一級緩存: 8 + 16 KiB (數據 + 指令)
- 插座:Socket 5 and Socket 7
- 核心電壓: 3.52V
- 前端匯流排: 50 (PR75), 60 (PR90), 66 MHz (PR100)
- 首次發表: 1996年3月27日
- 時鐘頻率: 75, 90, 100 MHz
[编辑] 5k86
- Sold as K5 PR120 to PR166 (200)
- 在350nm有430萬個電晶體
- 一級緩存: 8 + 16 KiB (數據 + 指令)
- 插座:Socket 5 and Socket 7
- 核心電壓: 3.52V
- 前端匯流排: 60 (PR120/150), 66 MHz
- 首次發表: 1996年10月7日
- 時鐘頻率: 90 (PR120), 100 (PR133), 105 (PR150), 116.6 (PR166), 133 MHz (PR200)
- -> The PR200 was planned but only very small numbers were built.
[编辑] 外部連結
- AMD: AMD-K5™ Processor Overview
- Technical overview of the K5 series
- Pictures of K5 chips at CPUShack.com
- The AMD K5, a much underrated chip
- AMD K5 technical specifications
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