Pentium Pro
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The Pentium Pro is a sixth-generation x86 architecture microprocessor (P6 core) produced by Intel and was originally intended to replace the original Pentium in a full range of applications, but later, was reduced to a more narrow role as a server and high-end desktop chip. The Pentium Pro was capable of both dual- and quad-processor configurations. It was introduced in a stunningly large, rectangular Socket 8 form factor in November 1995. Intel has since discontinued it in favor of the newer high-end Xeon processor lines.
The Pentium Pro (given the Intel product code 80521), was the first generation of the P6 architecture, which would carry Intel well into the next decade. The design would scale from its initial 150 MHz start, all the way up to 1.4 GHz with the "Tualatin" Pentium III. The core's various traits would continue after that in the derivative core called "Banias" in Pentium M and Intel Core (Yonah), which itself would evolve into Intel's Pentium M / Pentium 4 hybrid Core architecture (Core 2 processor) in 2006 and onward.
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[edit] Performance
Performance with 32-bit code was excellent and well ahead of the older Pentium at the time, by 25-35%; however, the Pentium Pro's 16-bit performance was approximately only 20% faster than a Pentium at running 16-bit code. It was this, along with the Pentium Pro's high price, due in part to the full speed on-die L2 cache, that caused the rather lackluster reception for the chip among many home PC enthusiasts, given the dominance at the time of the 16-bit Windows 3.1x and MS-DOS. Windows 95 had already been released at the time of the introduction of the Pentium Pro, but some parts of Windows 95 itself (for example, USER) were still mostly 16-bit. To truly gain the full advantages of Pentium Pro's architecture, one was forced to run a fully 32-bit OS. Microsoft's only truly 32-bit OS at the time was Windows NT 3.51, which was a very consumer-unfriendly operating system.
Despite the name, the Pentium Pro was actually a completely new architecture, very different from Intel's earlier Pentium processor. The Pentium Pro (P6) core featured an array of advanced RISC technologies, here used for the first time in an x86 CPU. Perhaps the most obvious sign that things had changed was that the CPU's "front end" decoded the old IA32 instructions into micro-instructions which the Pro's RISC core then processed. The core of Pentium Pro featured several new technologies, including: speculative execution, superpipelining, an incredibly advanced L2 cache, register renaming, out of order execution, and a wider 36-bit address bus (usable by PAE).
After the microprocessor was released a bug was discovered and is commonly called the "math bug" and by Intel as the "flag erratum". The bug occurred during integer to floating-point conversions that caused an overflow error but applicable status registers did not get set.
[edit] An innovation in cache
Likely Pentium Pro's most noticeable addition was its on-package L2 cache. At the time, manufacturing technology did not feasibly allow L2 cache to be integrated into the processor core. Intel instead placed the L2 die separately in the package which still allowed it to run at the same clock speed as the CPU core. Additionally, unlike motherboard-based cache which shared the main system bus with the CPU, the Pentium Pro's cache had its own backside bus (called dual independent bus by Intel). Because of this, the CPU could read main memory and cache concurrently, greatly reducing a traditional bottleneck. The cache was also "non-blocking", meaning that the processor could issue more than one cache request at a time (up to 4), reducing cache-miss penalties. These properties combined to produce a L2 cache that was immensely faster than the motherboard-based caches of older processors. This cache alone gave the CPU an incredible advantage in input/output performance over older x86 CPUs. In multiprocessor configurations, Pentium Pro's integrated cache skyrocketed performance in comparison to architectures which had each CPU sharing a central cache.
However, this far faster L2 cache did come with some complications. All versions of the chip were expensive, those with more than 256 KiB being particularly so. The Pro's "on-package cache" arrangement was unique. The processor and the cache were on separate dies in the same package and connected closely by a full-speed bus. The two dies — both of which were very large by the standards of the day — had to be bonded together early in the production process, before testing was possible. This meant that a single, tiny flaw in either die made it necessary to discard the entire assembly, which was one of the reasons for the Pentium Pro's relatively low production yield and high cost.
[edit] Available models
Pentium Pro clock speeds were 150, 166, 180 or 200 MHz with a 60 or 66 MHz external bus clock. Some users chose to overclock their Pentium Pro chips, with the 200 MHz version often being run at 233 MHz, and the 150 MHz version often being run at 166 MHz. The chip was popular in symmetric multiprocessing configurations, with dual and quad SMP server and workstation setups being commonplace.
The Pentium Pro was succeeded by the Pentium II, which was essentially a cost-reduced and re-branded Pentium Pro with the addition of MMX and enhanced 16-bit code performance. Costs were reduced by using standard SRAM cache chips running at half-speed, which increased production yields.
Eventually a 333 MHz Pentium II Overdrive processor for Socket 8 was produced by Intel as an upgrade option for owners of Pentium Pro systems, which had 512 KiB of high speed cache. However it only supported dual-processor operation, which did not make it a usable upgrade for high end quad-processor systems.
[edit] 6th generation x86 competitors
[edit] External links
- Backside Bus at Whatis.com
- Intel Pentium Pro technical specifications
- Intel Pentium Pro images and descriptions at cpu-collection.de
- CPU-INFO: Intel Pentium Pro, indepth processor history
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